On-Die ECC (Error Correction Code) is a new feature designed to correct bit errors within the DRAM chip.

As DRAM chips increase in density through shrinking wafer lithography, potential for data leakage increases. On-Die ECC mitigates this risk by correcting errors within the chip, increasing reliability and reducing defect rates. This technology cannot correct errors outside of the chip or that occur on the bus between the module and memory controller housed within the CPU. ECC enabled processors for servers and workstations feature the coding that can correct single or multi-bit errors on the fly. Extra DRAM bits must be available to allow this correction to occur, featured on ECC class module types like ECC unbuffered, Registered, and Load Reduced.